A research group published a low-DSP, 200G/lane-class silicon photonic modulator with a built-in constructive electro-optic equalizer in Nature Communications. The work aims to achieve high-bandwidth, low-voltage operation for AI data centers.
A research group published a paper in Nature Communications. The authors were Kawahara K., Tsuchizawa T., Yamamoto N., and others, and the work was conducted jointly by Institute of Science Tokyo, Yokohama National University, AIST, and Photonics Electronics Technology Research Association. The paper was published in 2026.
The modulator reported in the paper is a slow-light modulator using a silicon photonic-crystal waveguide. Its design uses a built-in electro-optic equalizer to resolve the trade-off between bandwidth and modulation efficiency. The aim is to reduce DSP load while targeting 200 Gb/s per lane and enable low-voltage operation.
The research is positioned as an effort to realize transceivers with the high bandwidth and low power consumption needed for multi-terabit-per-second optical interconnects in AI data centers. The paper was published in the 2026 edition of Nature Communications.