IMAPS 2026 was held in Boston, United States, from 29 September to 1 October, with research findings on semiconductor packaging and materials technologies for AI presented. Japanese companies and research institutions also participated, and discussions were held on strengthening collaboration between Japan and the United States.
Semiconductor-related companies and research institutions from around the world gathered at the venue, where research findings on advanced packaging and materials technologies supporting higher performance in AI semiconductors were presented. A diverse range of companies participated, including approximately 100 exhibiting companies.
The technical sessions introduced “High-Bandwidth Compute (HBC),” a three-dimensional packaging technology designed to address challenges arising from the expansion of inference processing for AI. One concept discussed involved placing computing circuits directly beneath DRAM. The University of North Texas presented low-temperature Cu-Cu direct bonding technology, while Osaka University and 奥野製薬工業 presented a technology for forming highly reliable copper electrodes on glass substrates.
Through-hole filling technology from MacDermid Alpha Electronics Solutions, a high-thermal-conductivity solder resist developed by Taiyo Ink Manufacturing and the Georgia Institute of Technology, and plating technology for high-aspect-ratio TGVs from Corning R&D were also presented, highlighting the strong interest in packaging and materials technologies supporting AI semiconductors.
The Consulate-General of Japan in Boston hosted the JP-US Semiconductor Reception, where the head of a research institute at MIT delivered a speech. The importance of collaboration leveraging the manufacturing and research and development capabilities of Japan and the United States, as well as ecosystem building, was emphasised, and expectations were expressed for deeper cooperation going forward.