Announced details
Latency can be reduced by 90% and power consumption by 73% (compared with systems using DSPs in the optical path)
Product development is being advanced with support from an NICT grant program.
A national research and development agency. Other details: not disclosed.
ZERO EYE SKEW® is a registered trademark of THine Electronics, Inc. Registration number and validity period: not disclosed. Grant program number: JPJ012368G70601
FYCMA (Trade Fairs and Congress Center of Málaga, Málaga, Andalusia, Spain)
In this announcement the company addresses none of Contract Value / Offering price / Impact on Business Performance.
European Conference on Optical Communications (basis for describing it as Europe’s largest)
PCIe 6-compliant, with transmission speeds of 64 Gbps per lane. PCIe 7-compliant chipsets will support transmission speeds of 128 Gbps per lane, with sample availability planned for 2027.
| Item | Details |
|---|---|
| Names of Products / Services Covered | VCSEL driver THLD6481, TIA THTA6482, ZERO EYE SKEW® technology |
| Counterparty | National Institute of Information and Communications Technology (NICT) |
| Counterparty overview | A national research and development agency. Other details: not disclosed. |
| Relationship with the Company | Product development is being advanced with support from an NICT grant program. |
| Launch date | 21–23 September 2026 (scheduled exhibition at ECOC2026) / PCIe 7-compliant products scheduled for sample availability in 2027 |
| Applicable area | AI Data Center, AI server scale-up, Hikari Tsushin, Near-packaged optics (NPO), Co-packaged optics (CPO), Optical interconnects usable for connections between UCIe retimers |
| Registration number and expiry date | ZERO EYE SKEW® is a registered trademark of THine Electronics, Inc. Registration number and validity period: not disclosed. Grant program number: JPJ012368G70601 |
| Location | FYCMA (Trade Fairs and Congress Center of Málaga, Málaga, Andalusia, Spain) |
| Quantitative Effects | Latency can be reduced by 90% and power consumption by 73% (compared with systems using DSPs in the optical path) |
| Source | European Conference on Optical Communications (basis for describing it as Europe’s largest) |
| provided_specifications | PCIe 6-compliant, with transmission speeds of 64 Gbps per lane. PCIe 7-compliant chipsets will support transmission speeds of 128 Gbps per lane, with sample availability planned for 2027. |
Items this document does not state (8)
These are items the company does not state in this document. We do not leave them blank, nor fill them in from other sources or by inference.
The reasons the company gives
The company's own explanation, not something inferred from the numbers.To enable low-latency, low-power, high-density and low-cost ultra-high-speed data transmission between GPUs and memory as part of scaling up the computing capabilities of AI servers.